The present invention relates generally to assembly techniques. Alignment and probing techniques to improve the accuracy of component placement during assembly are described. More particularly, the invention includes methods and structures to detect and improve the component placement accuracy on a target platform by incorporating alignment marks on components and reference marks on target platforms. The proper alignment of the marks is assessed with various probing techniques. A set of sensors grouped in an array to form a multiple-sensor probe can detect the deviation of displaced components in assembly. Merely by way of example, the invention may be applied to place packaged devices onto electronic substrates for the manufacture of electronic systems. However, it should be recognized that the invention has a much broader range of applicability.
Electronic devices have proliferated over the years. As the complexity and the operation speed of integrated circuits (IC) increase, it is not unusual to see an increasing number of devices with pin-counts exceeding hundreds or even a thousand. For example, high-speed designs requires many power and ground pins. Differential pairs are replacing the single-end signals at the input and output pins (I/O) of a device to meet the signal integrity requirements. In addition, as system-on-a-chip becomes a reality, more and more pins are added to the device I/O to supports more functions. Many if not all of these tend to increase the number of pins in a packaged device or component.
As the device pin-count increases, the pin pitch of the device tends to decrease to limit the package size. The reduced pin-pitch poses a challenge for the placement equipment to place components accurately on a target platform, such as a printed circuit board (PCB), especially if the pin pitch is smaller than 0.5 mm.
Conventional surface-mount equipment use the Cartesian coordinates at the center of a target land pattern as a reference point to place a component on a PCB. There is no feedback to monitor the accuracy of the component placement. Without proper feedback, the accuracy of the component placement is uncertain. Actually, the accuracy of the component placement is influenced by the imperfectness in the package's outline, the deviation of the component's contact array from an ideal grid location, the imperfectness in PCB mounting references, the aging and the intrinsic tolerance of the placement equipment, and so on. As the accumulative error is getting closer to the pitch size of the contact array, placing a component accurately on a PCB is becoming a greater challenge.
It is not uncommon to encounter component placement problems in a surface mount assembly line, especially for the placement of fine-pitch components. For example, if a BGA component is inaccurately placed on a PCB, it could cause the BGA's contact array to deviate from the ideal land pattern location, resulting in either inadequate soldering or solder bridging to adjacent pads on the PCB. A rework to fix these problems is tedious and expensive. It is even worse for the rework of a pricy, high pin-count component on a high density PCB.
Furthermore, manufacturers frequently use sockets to house high-end, high pin-count chips on motherboards. This enables users to choose proper speed grade components or to perform speed upgrade at field. However, there is no handy method for users or manufacturers to monitor if a chip has been properly inserted in the socket or if the chip is in good contact with the receptacle inside the socket.
Thus, it is seen that techniques for detecting and improving component placement accuracy and for detecting the contact status are desirable.